Poster Session 3 w/ Brief Oral Presentations
(9:30-11:30, Aug. 23, 2017 (Day 3))

Room A (for Brief Oral Presentations)

# Title/Author(s)
3A-1 Design of an Integrated Noninverting Buck–Boost DC–DC Converter
Xiang-En Hong, Hung-Hsien Wu, and Chia-Ling Wei
3A-2 Experiments on a Hardware-Efficient Bio-Inspired Snake-like Robot
Kentaro Takeda and Hiroyiki Torikai
3A-3 A Temperature to Frequency Converter with Linearity Calibration
Zong-You Hou, Jhih-Cheng You, and Chua-Chin Wang
3A-4 Effect of Changing Oscillator Frequencies to Synchronization Phenomena in Coupled van der Pol Oscillators
Vu Minh Hien, Tran Minh Hai, Yoko Uwate, and Yoshifumi Nishio
3A-5 Aggressive Leakage Power Reduction of SRAM using a DRV Monitor
Chi-Ray Huang, Kuan-Lin Wu, Chung-Han Wu, and Lih-Yih Chiou
3A-6 Synchronization Phenomena in Two Chaotic Circuits Coupled with Memristors and a Resister
Kana Kobayashi, Yasuteru Hosokawa, Yoko Uwate, and Yoshifumi Nishio
3A-7 Automatic Layout Synthesis Tool for DC-DC Current-Mode Control Buck Converter
Hsin-Ju Hsu, Hao-Yu Chi, Chi-Lien Kuo, and Chien-Nan Liu
3A-8 Dynamics of energy stored in four car-sharing stations with time-varying topology
Yusuke Izumi, Koki Yoshida, Akira Ito, Keiji Konishi, and Naoyuki Hara

Room B (for Brief Oral Presentations)

# Title/Author(s)
3B-1 An Environment Control System of Anemonefish
Shu-Min Tsai
3B-2 Reset control of chaos in Duffing equation
Masataka Iwai
3B-3 A Fast and Accurate Incremental Aging Analysis Approach
Si-Rong He, Nguyen Cao Qui, Yu-Hsuan Kuo, and Chien-Nan Liu
3B-4 Synchronization of Each Connection in Coupled Chaotic Circuits
Shuhei Hashimoto, Takahiro Chikazawa, Yoko Uwate, and Yoshifumi Nshio
3B-5 System Level Design of GPU Memory Subsystem Architecture
Harvey Zeng and Chung-Ho Chen
3B-6 Flexible Two-Colorable Routing for Self-Aligned Double Patterning
Yusuke Kimura, Shimpei Sato, and Atsushi Takahashi
3B-7 A Heterogeneous System Architecture Intermediate Language Compatible GPU Platform Supporting Mixed Concurrent Kernel Execution
Sen-Chih Tsai
3B-8 Ratio of Chaotic Propagation According Network Topology in Complex Networks with Coupled Chaotic Circuits
Takahiro Chikazawa, Yoko Uwate, and Yoshifumi Nishio

Room C (for Brief Oral Presentations)

# Title/Author(s)
3C-1 A Heterogeneous System Architecture Intermediate Language Compatible Single Instruction Multiple Thread Core
Chien-Ming Chiu and Chung-Ho Chen
3C-2 Cirucuit Design of DC-DC Converter with Potovoltaic Cell
Kenta Shinohara, Hirokazu Ohtagaki, Takuji kousaka, Daiki Watanabe, and Hiroyuki Asahara
3C-3 80dB CMRR and 70dB PSRR Analog Front-end Integrated Chip and Digital Signal Processing Algorithm for a ECG Acquisition System
Wen-Chih Li, Yu-Syuan Jhang, Te-Hsuan Hung, Yi-Hsiang Juan, Wen-Ho Juang, Ching-Hsing Luo, and Shin-Chi Lai
3C-4 A Study on Window Sizes in NLM Filter
Xiangbo Kong, Hiroyuki Tomiyama, and Ittetsu Taniguchi
3C-5 Novel Digital Calibration Algorithm Based on Matrix-Form Analysis for a 12-Bit SAR ADC Design
Yu-Syuan Jhang, Wen-Chih Li, Yi-Hsiang Juan, Wen-Ho Juang, Ching-Hsing Luo, Shuenn-Yuh Lee, and Shin-Chi La
3C-6 Excitation-Frequency-Dependent Symmetry of Probabilistic Trajectory of A Particle on A Circular Disc
Keita Matsuura and Hisato Fujisaka
3C-7 Investigation of a New Clustering Method used Modified Firefly Algorithm for K-Means Clustering
Masaki Takeuchi, Thomas Ott, Haruna Matsushita, Yoko Uwate, and Yoshifumi Nishio
3C-8 Stochastic Stability of Optimally Controlled Power Systems
Shazlan Mohammad Wan, Hiroyuki Asahara, Masahiko Tamai, and Hirokazu Ohtagaki

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